Efficient robust monitoring for STL A Donzé, T Ferrere, O Maler Computer Aided Verification: 25th International Conference, CAV 2013, Saint …, 2013 | 242 | 2013 |
Timed pattern matching D Ulus, T Ferrère, E Asarin, O Maler Formal Modeling and Analysis of Timed Systems: 12th International Conference …, 2014 | 65 | 2014 |
Online timed pattern matching using derivatives D Ulus, T Ferrère, E Asarin, O Maler Tools and Algorithms for the Construction and Analysis of Systems: 22nd …, 2016 | 49 | 2016 |
AMT 2.0: qualitative and quantitative trace analysis with extended signal temporal logic D Ničković, O Lebeltel, O Maler, T Ferrère, D Ulus International Journal on Software Tools for Technology Transfer 22, 741-758, 2020 | 46 | 2020 |
Trace diagnostics using temporal implicants T Ferrère, O Maler, D Ničković Automated Technology for Verification and Analysis: 13th International …, 2015 | 33 | 2015 |
Localizing faults in Simulink/Stateflow models with STL E Bartocci, T Ferrère, N Manjunath, D Ničković Proceedings of the 21st International Conference on Hybrid Systems …, 2018 | 30 | 2018 |
Efficient parametric identification for STL A Bakhirkin, T Ferrère, O Maler Proceedings of the 21st International Conference on Hybrid Systems …, 2018 | 27 | 2018 |
On the quantitative semantics of regular expressions over real-valued signals A Bakhirkin, T Ferrère, O Maler, D Ulus Formal Modeling and Analysis of Timed Systems: 15th International Conference …, 2017 | 27 | 2017 |
Interface-aware signal temporal logic T Ferrère, D Nickovic, A Donzé, H Ito, J Kapinski Proceedings of the 22nd ACM International Conference on Hybrid Systems …, 2019 | 26 | 2019 |
Measuring with timed patterns T Ferrère, O Maler, D Ničković, D Ulus Computer Aided Verification: 27th International Conference, CAV 2015, San …, 2015 | 25 | 2015 |
A theory of register monitors T Ferrère, TA Henzinger, NE Saraç Proceedings of the 33rd Annual ACM/IEEE Symposium on Logic in Computer …, 2018 | 17 | 2018 |
The first-order logic of signals A Bakhirkin, T Ferrère, T Henzinger, D Nickovic International Conference on Embedded Software (EMSOFT), 2018 | 16 | 2018 |
From real-time logic to timed automata T Ferrere, O Maler, D Ničković, A Pnueli Journal of the ACM (JACM) 66 (3), 1-31, 2019 | 15 | 2019 |
Online timed pattern matching using automata A Bakhirkin, T Ferrere, D Nickovic, O Maler, E Asarin Formal Modeling and Analysis of Timed Systems: 16th International Conference …, 2018 | 13 | 2018 |
Shape expressions for specifying and extracting signal features D Ničković, X Qin, T Ferrère, C Mateis, J Deshmukh Runtime Verification: 19th International Conference, RV 2019, Porto …, 2019 | 10 | 2019 |
The compound interest in relaxing punctuality T Ferrère Formal Methods: 22nd International Symposium, FM 2018, Held as Part of the …, 2018 | 8 | 2018 |
Flavors of sequential information flow E Bartocci, T Ferrère, TA Henzinger, D Nickovic, AO Da Costa Verification, Model Checking, and Abstract Interpretation: 23rd …, 2022 | 6 | 2022 |
Monitoring event frequencies T Ferrère, TA Henzinger, B Kragl arXiv preprint arXiv:1910.06097, 2019 | 6 | 2019 |
Monitoring temporal logic with clock variables A Elgyütt, T Ferrère, TA Henzinger Formal Modeling and Analysis of Timed Systems: 16th International Conference …, 2018 | 5 | 2018 |
Assertions and measurements for mixed-signal simulation T Ferrere Ph. D. Dissertation. Ph. D. thesis, 2016 | 5 | 2016 |