| Memory-centric accelerator design for convolutional neural networks M Peemen, AAA Setio, B Mesman, H Corporaal 2013 IEEE 31st international conference on computer design (ICCD), 13-19, 2013 | 435 | 2013 |
| Microprocessor Architectures: from VLIW to TTA H Corporaal John Wiley & Sons, Inc., 1997 | 395 | 1997 |
| Multiprocessor resource allocation for throughput-constrained synchronous dataflow graphs S Stuijk, T Basten, MCW Geilen, H Corporaal Proceedings of the 44th annual Design Automation Conference, 777-782, 2007 | 219 | 2007 |
| System-scenario-based design of dynamic embedded systems SV Gheorghita, M Palkovic, J Hamers, A Vandecappelle, S Mamagkakis, ... ACM Transactions on Design Automation of Electronic Systems (TODAES) 14 (1 …, 2009 | 205 | 2009 |
| Memristor based computation-in-memory architecture for data-intensive applications S Hamdioui, L Xie, HA Du Nguyen, M Taouil, K Bertels, H Corporaal, ... 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2015 | 193 | 2015 |
| Designing domain-specific processors M Arnold, H Corporaal Proceedings of the ninth international symposium on Hardware/software …, 2001 | 189 | 2001 |
| A detailed GPU cache model based on reuse distance theory C Nugteren, GJ Van den Braak, H Corporaal, H Bal 2014 IEEE 20th International Symposium on High Performance Computer …, 2014 | 142 | 2014 |
| MOVE: A framework for high-performance processor design H Corporaal, H Mulder Proceedings of the 1991 ACM/IEEE conference on Supercomputing, 692-701, 1991 | 135 | 1991 |
| Memristor for computing: Myth or reality? S Hamdioui, S Kvatinsky, G Cauwenberghs, L Xie, N Wald, S Joshi, ... Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017 …, 2017 | 114 | 2017 |
| An ultra-low-energy multi-standard JPEG co-processor in 65 nm CMOS with sub/near threshold supply voltage Y Pu, JP de Gyvez, H Corporaal, Y Ha IEEE Journal of Solid-State Circuits 45 (3), 668-680, 2010 | 114 | 2010 |
| An FPGA design flow for reconfigurable network-based multi-processor systems on chip A Kumar, A Hansson, J Huisken, H Corporaal 2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007 | 105 | 2007 |
| Coarse grained reconfigurable architectures in the past 25 years: Overview and classification M Wijtvliet, L Waeijen, H Corporaal 2016 International Conference on Embedded Computer Systems: Architectures …, 2016 | 103 | 2016 |
| Transport-triggering vs. operation-triggering J Hoogerbrugge, H Corporaal Compiler Construction: 5th International Conference, CC'94 Edinburgh, UK …, 1994 | 102 | 1994 |
| Fast multidimension multichoice knapsack heuristic for mp-soc runtime management C Ykman-Couvreur, V Nollet, F Catthoor, H Corporaal ACM Transactions on Embedded Computing Systems (TECS) 10 (3), 1-16, 2011 | 98 | 2011 |
| Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA A Kumar, S Fernando, Y Ha, B Mesman, H Corporaal ACM Transactions on Design Automation of Electronic Systems (TODAES) 13 (3 …, 2008 | 91 | 2008 |
| Adaptive and transparent cache bypassing for GPUs A Li, GJ van den Braak, A Kumar, H Corporaal Proceedings of the International Conference for High Performance Computing …, 2015 | 90 | 2015 |
| Partitioned register file for TTAs J Janssen, H Corporaal Proceedings of the 28th annual international symposium on Microarchitecture …, 1995 | 88 | 1995 |
| Run-time management of a mpsoc containing fpga fabric tiles V Nollet, P Avasare, H Eeckhaut, D Verkest, H Corporaal IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16 (1), 24-33, 2007 | 84 | 2007 |
| Making graphs reducible with controlled node splitting J Janssen, H Corporaal ACM Transactions on Programming Languages and Systems (TOPLAS) 19 (6), 1031-1052, 1997 | 84 | 1997 |
| Transport-triggered architectures: Design and evaluation. H Corporaal | 80 | 1997 |
