Henk Corporaal
Henk Corporaal
Professor Embedded System Architectures, Eindhoven University of Technology, the Netherlands
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TitelGeciteerd doorJaar
Microprocessor Architectures: from VLIW to TTA
H Corporaal
John Wiley & Sons, Inc., 1997
Memory-centric accelerator design for convolutional neural networks
M Peemen, AAA Setio, B Mesman, H Corporaal
2013 IEEE 31st International Conference on Computer Design (ICCD), 13-19, 2013
Multiprocessor resource allocation for throughput-constrained synchronous dataflow graphs
S Stuijk, T Basten, MCW Geilen, H Corporaal
2007 44th ACM/IEEE Design Automation Conference, 777-782, 2007
System-scenario-based design of dynamic embedded systems
SV Gheorghita, M Palkovic, J Hamers, A Vandecappelle, S Mamagkakis, ...
ACM Transactions on Design Automation of Electronic Systems (TODAES) 14 (1), 3, 2009
Designing domain-specific processors
M Amold, H Corporaal
Ninth International Symposium on Hardware/Software Codesign. CODES 2001 …, 2001
MOVE: A framework for high-performance processor design
H Corporaal, H Mulder
Conference on High Performance Networking and Computing: Proceedings of the …, 1991
An FPGA design flow for reconfigurable network-based multi-processor systems on chip
A Kumar, A Hansson, J Huisken, H Corporaal
2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007
An ultra-low-energy multi-standard JPEG co-processor in 65 nm CMOS with sub/near threshold supply voltage
Y Pu, JP De Gyvez, H Corporaal, Y Ha
IEEE Journal of Solid-State Circuits 45 (3), 668-680, 2010
Memristor based computation-in-memory architecture for data-intensive applications
S Hamdioui, L Xie, HAD Nguyen, M Taouil, K Bertels, H Corporaal, H Jiao, ...
Proceedings of the 2015 design, automation & test in Europe conference …, 2015
A detailed GPU cache model based on reuse distance theory
C Nugteren, GJ Van den Braak, H Corporaal, H Bal
2014 IEEE 20th International Symposium on High Performance Computer …, 2014
Layer assignment techniques for low energy in multi-layered memory organizations
E Brockmeyer, B Durinck, H Corporaal, F Catthoor
Designing Embedded Processors, 157-190, 2007
Partitioned register file for TTAs
J Janssen, H Corporaal
Proceedings of the 28th annual international symposium on Microarchitecture …, 1995
Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA
A Kumar, S Fernando, Y Ha, B Mesman, H Corporaal
ACM Transactions on Design Automation of Electronic Systems (TODAES) 13 (3), 40, 2008
Run-time management of a mpsoc containing fpga fabric tiles
V Nollet, P Avasare, H Eeckhaut, D Verkest, H Corporaal
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16 (1), 24-33, 2007
Making graphs reducible with controlled node splitting
J Janssen, H Corporaal
ACM Transactions on Programming Languages and Systems (TOPLAS) 19 (6), 1031-1052, 1997
Transport-triggered architectures: Design and evaluation.
H Corporaal
Automatic scenario detection for improved WCET estimation
SV Gheorghita, S Stuijk, T Basten, H Corporaal
Proceedings. 42nd Design Automation Conference, 2005., 101-104, 2005
Fast multi-dimension multi-choice knapsack heuristic for MP-SoC run-time management
C Ykman-Couvreur, V Nollet, F Catthoor, H Corporaal
2006 International Symposium on System-on-Chip, 1-4, 2006
Using transport triggered architectures for embedded processor design
H Corporaal, M Arnold
Integrated Computer-Aided Engineering 5 (1), 19-38, 1998
An ultra-low-energy/frame multi-standard JPEG co-processor in 65nm CMOS with sub/near-threshold power supply
Y Pu, JP de Gyvez, H Corporaal, Y Ha
2009 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2009
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